Level Setting DAC Calibration for ATE Pin Electronics

[Introduction]This article provides a method for calibrating digital-to-analog converters (DACs) specific to pin electronics drivers, comparators, loads, PMUs, and DPSs. DACs have nonlinearities such as differential nonlinearity (DNL) and integral nonlinearity (INL), which can be minimized through gain and offset adjustments. This article describes how to perform these calibrations to improve level setting performance.

Introduction

Automated Test Equipment (ATE) describes test equipment used to perform a single or series of tests on a single or multiple devices at a time. Different types of ATE test electronics, hardware and semiconductor devices. Timing devices, DACs, ADCs, multiplexers, relays, and switches are all supporting modules in a tester or ATE system. These pin electronics provide signals and power with precise voltages and currents. These precision signals are configured via level setting DACs. In the ATE product family, some pin electronics contain calibration registers, and some calibration settings are stored off-chip. This article describes the function of the DAC, its errors, and how to calibrate it with gain and offset adjustments.

Digital-to-Analog Converter (DAC)

A DAC is a data converter that converts digital inputs to corresponding analog output levels. An N-bit DAC can support 2N output levels. The higher the number of bits, the higher the DAC output resolution.

Level Setting DAC Calibration for ATE Pin Electronics

Figure 1. Digital-to-analog converter (DAC) block diagram.

First, an N-bit digital input is provided to the DAC serial register. Voltage switches and resistor summing networks convert digital inputs to analog output levels. The conversion characteristics of the DAC diagram are shown in Figure 2. For a 3-bit DAC, 23 digital inputs generate 8 analog output levels.

Level Setting DAC Calibration for ATE Pin Electronics

Figure 2. Ideal transfer function for a 3-bit DAC.

DAC error

In the real world, converters are not ideal. Due to errors in resistor values, interpolation and sampling, the transfer function of a DAC is not a straight line, or is linear. These errors are called differential nonlinearity (DNL) and integral nonlinearity (INL). DNL is the maximum deviation of the output level from the ideal step size and is derived from the difference between two consecutive output voltage levels. INL is the maximum deviation between the input/output characteristics and the ideal transfer function. Through gain and offset correction, the INL error can be reduced.

The INL in Figure 3 shows the deviation between the actual transfer function and the ideal transfer function. The gain error of the DAC indicates how closely the slope of the linear approximation of the actual transfer function matches the slope of the ideal transfer function. Adjusting the gain affects the linear approximation angle when plotting. Offset error is the difference between the measured value and the selected zero offset point. If you adjust the offset, the entire linear approximation curve moves up or down accordingly. The INL of a single code is the sum of the gain error and offset error at any given point. After calibration, once the gain and offset errors are minimized, the transfer function will be a line between the two endpoints.

Level Setting DAC Calibration for ATE Pin Electronics

Figure 3. INL error transfer function.

Calibration procedure

Users can create calibration routines that utilize gain and offset corrections to reduce DAC nonlinearity. The following steps detail each step of the example calibration procedure.

For N-bit DACs:

Level Setting DAC Calibration for ATE Pin Electronics

● Gain Correction (GC):

At the lowest and highest binary values, the linearity of the DAC decreases. Therefore, it is recommended to select a calibration point within the range of 5% to 10% between the external binary value or the calibration point recommended by the EC table. For the following calculations, we assume that a 5% calibration point is chosen.

○ Set the DAC input 5% above the lowest binary value. Calculate the expected voltage output and record it as IDEAL1. Measure the output voltage and record it as MEAS1.

○ Set the DAC input 5 % below the highest binary value. Calculate and record IDEAL2. Measure the output voltage and record it as MEAS2.

Level Setting DAC Calibration for ATE Pin Electronics

Level Setting DAC Calibration for ATE Pin Electronics

● Offset Correction (OC):

The required zero bias point varies by application. Users should define the best value according to their application. Some users may prefer to use 0V for an accurate ground reference. Some users prefer to use the middle of the operating range to minimize overall INL error.

○ Apply DAC gain correction to the slope of the voltage-code equation to establish unity gain.

○ Select the desired zero bias voltage point and record it as IDEAL3. Calculate the code using the updated voltage-code formula. Program the calculated code, then measure the output voltage and record it as MEAS3.

Level Setting DAC Calibration for ATE Pin Electronics

Level Setting DAC Calibration for ATE Pin Electronics

Example 1

Take the MAX32007 as an example, it is an octal DCL with integrated level setting DAC and PMU switch. The MAX32007 has internal DACs for setting the levels of VDH, VDL, VDT/VCOM, VCH, VCL, VCPH, and VCPL. These DACs do not have internal calibration registers. When calibrating the DAC, follow these steps:

○ Start the MAX32007 evaluation (EV) kit by following the instructions in the EV kit data sheet.

○ Connect the SMB connectors DATA0A and NTRM0A to 1.2 V.

○ Ground SMB connectors NDATA0A and TRM0A through 50 Ω termination.

○ Using a USB cable, connect the evaluation kit to a Windows® 10 PC. Open the MAX32007 evaluation kit software (GUI).

Level Setting DAC Calibration for ATE Pin Electronics

Use the DAC voltage levels and driver settings shown in Figure 4. Note that the lowest VDH DAC operating voltage value is –1.5 V, and the highest operating voltage value is 4.5 V; in this example, the zero bias point value is 1.5 V.

Level Setting DAC Calibration for ATE Pin Electronics

Figure 4. Setting the MAX32007’s DAC levels using the EV kit software.

○ Apply VDH = –1.5 V, then measure the output voltage value.

○ Apply VDH = 4.5 V, then measure the output voltage value.

○ Gain Correction = Difference between measured output voltage values/difference between ideal values. For example, (4.501–(–1.497))/(4.5–(–1.5)) = 0.999667.

Level Setting DAC Calibration for ATE Pin Electronics

To apply gain correction, open Menu → Options → Calibration, as shown in Figure 5.

Level Setting DAC Calibration for ATE Pin Electronics

Figure 5. Calibration menu for the MAX32007 DAC.

Level Setting DAC Calibration for ATE Pin Electronics

Figure 6. INL error correction for a DAC with calibration register.

○ Apply VDH = 1.5 V (including gain correction code) and measure the output voltage value.

○ Offset correction = measured output value – ideal value. For example, (1.502–1.5) = 0.002.

○ After performing gain and offset correction,

Level Setting DAC Calibration for ATE Pin Electronics

Example 2

Take the MAX9979 as an example, it is an octal DCL with integrated level setting DAC and PMU. The MAX9979 contains internal DACs to set the levels of VDH, VDL, VDT, VCH, VCL, VCPH, VCPL, VCOM, VLDH, VLDL, VIN, VIOS, CLAMPHI/VHH, and CLAMPLO. These DACs have internal calibration registers. In Example 1, the DAC output code is adjusted to minimize INL error. In Example 2, the DAC input code remains the same, and the calibration register adjusts the output stage buffer to minimize INL error, as shown in Figure 6. To calibrate the DAC, follow these steps:

○ Start the MAX9979 EV kit as described in the EV kit data sheet.

○ Connect the SMB connectors DATA0A and NTRM0A to 1.2 V.

○ Ground SMB connectors NDATA0A and TRM0A through 50 Ω termination.

○ Using the USB cable, connect the evaluation kit to the Windows 10 PC. Open the MAX9979 EV kit software (GUI).

Level Setting DAC Calibration for ATE Pin Electronics

○ Use the DAC voltage levels and driver settings shown in Figure 7. Note that the minimum recommended value for the VDH DAC is –1.5 V, the maximum recommended value is 4.5 V, and the zero bias point is 1.5 V.

Level Setting DAC Calibration for ATE Pin Electronics

Figure 7. Setting the MAX9979’s DAC levels using the EV kit software.

○ Apply VDH = -1.45 V, then measure the output voltage value.

○ Apply VDH = 6.5 V, then measure the output voltage value.

○ Gain Correction = Difference between measured output voltage values/difference between ideal values. For example, (6.501 V–(–1.455 V))/(6.5 V–(–1.45 V)) = 1.0007 V.

○ After gain correction,

Level Setting DAC Calibration for ATE Pin Electronics

Note that to perform gain and offset correction, go to Menu → Options → Change → Calibration as shown in Figure 8. See the MAX9979 data sheet for more information on converting gain and offset corrections to gain and offset codes.

Level Setting DAC Calibration for ATE Pin Electronics

Figure 8. Calibration register settings for the MAX9979

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