“Image surveillance is widely used in many occasions because of its intuitiveness, convenience, and rich information content. In the development of Electronic technology and communication technology, the technical level of the image monitoring system directly reflects the technical status of electronics and communication at different stages. In the late 1990s, with the development of multimedia technology, video compression coding technology and network communication technology, digital video surveillance systems rose rapidly. In the digital image monitoring system, the embedded monitoring system is mainly composed of embedded processor, Ethernet interface controller and other related supporting hardware and embedded operating system.
Image surveillance is widely used in many occasions because of its intuitiveness, convenience, and rich information content. In the development of electronic technology and communication technology, the technical level of the image monitoring system directly reflects the technical status of electronics and communication at different stages. In the late 1990s, with the development of multimedia technology, video compression coding technology and network communication technology, digital video surveillance systems rose rapidly. In the digital image monitoring system, the embedded monitoring system is mainly composed of embedded processor, Ethernet interface controller and other related supporting hardware and embedded operating system.
1. Design plan
Using TI’s TMS320VC5471 as the processor, this chip is a dual-core device that integrates a TMS320C54x DSP subsystem with program and data memory (both RAM) and an ARM7TMRISC microcontroller core with simulation tools. In the dual CPU system, ARM7TDMI is the main CPU, responsible for image data storage, image data remote transmission, storage capacity expansion and other system functions; DSP as the slave CPU, it is the core of image acquisition and data processing, complete image acquisition and The function of the processing system. The data transmission between the ARM subsystem and the DSP subsystem is very frequent. The system selects the shared dual-port RAM memory method to realize the communication between DSP and ARM7TDMI. The block diagram of the image monitoring system is shown in Figure 1.
2. Hardware system
2.1 Host control unit
The data transmission between the ARM subsystem and the DSP subsystem is very frequent, and the reliability and real-time performance of the data transmission directly determine the performance of the system. Therefore, this system selects the shared dual-port RAM memory method to realize the communication between DSP and ARM7TDMI, such as the dual-port RAM IDT70V24 produced by IDT Division, with a capacity of 4K×16 bits.
It is inevitable to encounter communication problems within the dual-core during work. This design adopts an interrupted communication method. Either party first puts the prepared data into the API memory, and then sends an interrupt signal to notify the other party that the number can be accessed. After receiving the interrupt, the other party enters the interrupt service routine to fetch the data from the API memory.
2.2 Analog image acquisition and processing unit
The image signal is collected by the CCD camera and output the analog image signal, and the analog image A/D conversion is realized by Philips SAA7111A. The chip can realize multi-channel gating, phase lock and timing, clock generation and testing, ADC, bright color separation and other functions. Its output can have the following formats: YUV4:1:1 (12bit), YUV 4:2:2 (16bit ), YUV4: 2: 2 (CCIR-656) (8bit), etc., flexible output of different digital image data formats. Due to the different timings of the DSP processing chip and SA7111A, CPLD can be used to logically control the FIFO to complete the data buffer function.
2.3 Keyboard control unit
This system uses TI’s TMS320VC5471 as the processor, and it is very easy to connect to a matrix keyboard. The ARM side provides a keyboard dedicated interface KBGPIO. KBGPIO[15: 8]has been connected to the +3.3V high level through a pull-up resistor inside the chip, and is configured as an input port, which can be used as a row input of a matrix keyboard. KBGPIO[7:0]is configured as an input port. It can be used as the column input of a matrix keyboard. The keyboard circuit input does not need to be connected to a high level through a pull-up resistor, and only the row and column lines are drawn out to the two ends of the key. The keyboard can have 24 actual hard keys in total, and the function of each key can be defined by the user at will.
2.4 Storage capacity expansion unit
There is a large amount of data to be recorded in the system, and a large amount of memory is needed to save the measured data. Connect SRAM, FLASH, and CF cards to the main CPU. CF card has the characteristics of large storage capacity, fast reading and writing speed, and strong flexibility. It is an ideal storage carrier. This system uses the CompactFlash Card produced by KINGMAX. The storage capacity of the card is 1G, and the chip ARM core is built-in and integrated. The circuit IIC interface connects the CompactFlash card to the IIC interface of the microcontroller. In the memory mapping mode, an 8-bit data bus controls the CompactFlash card, and the software can write data directly to the CompactFlash card. The structure of the CF card is shown in Figure 2.
2.5 Ethernet control unit
The network module (EIM) of TMS320VC5471 can realize the function of the 10/100Mbit/s MAC layer of IEEE802.3 agreement and full duplex/half duplex mode. The PHY interface of this system is composed of the RTL8201BL chip produced by Realtek. The RTL8201BL uses the MII interface to directly connect to the MAC controller of TMS320VC5471. The transmit output pin TPTX± and the receive input TPRX± of RTL8201 are connected to the RJ45 twisted pair through the network isolation transformer. Connect to realize the safe isolation of the data channel.
2.6 Real-time image monitoring unit
Connect this system to the Internet network, you can carry out real-time image monitoring through the Internet, without having to visit the scene in person. μC/OS-II is a real-time embedded operating system, which is an RTOS with open source code preemptive multitasking microkernel. This design uses μC/OS-II and transplants it to the embedded ARM7 core of TMS320VC5471. The network communication protocol selects the LwIP protocol stack through the TCP/IP protocol stack, and implements it by moving the LwIP protocol stack in. The structure diagram of the embedded network platform is shown in Figure 3.
3. Software design
Using ARM assembly language, each system is made into subroutine function blocks, which can not only make the program compact and easy to read, but also enhance the portability of the program, and it is more convenient to debug and modify the functional modules. The block diagram is shown in Figure 4.
The design method of embedded system based on dual CPU real-time image monitoring proposed in this paper makes full use of the high performance of TMS320VC5471 and the real-time and stable characteristics of embedded operating system. The TCP/IP protocol is used to establish a connection with the Internet to realize real-time image monitoring. Remote control. This mode of combining dual CPU processors and embedded operating systems can be widely used in video detection fields such as industrial control, product manufacturing, and intelligent transportation, and has a wide range of application prospects.